Question about generated code by LLVM-RL78 (code – 2021/05/13)
Question about generated code by LLVM-RL78 (code – 2021/05/13)
Hello support team,
I found the following generated code by LLVM-RL78 in my program. My understanding is that LLVM-RL78 supports the register bank feature of RL78. But the following code works with only register bank 0. Is my understanding wrong?
00005938 _OUTLINED_FUNCTION_15:
5938: 12 movw bc, ax
5939: 7a fa a5 xor 0xffefa, #165 <– I think that this is intended to be ‘xor c, #0xA5’
593c: 7a fb a5 xor 0xffefb, #165 <– I think that this is intended to be ‘xor b, #0xA5’
593f: d7 ret
[Note]
Instructions such as ‘xor c, #IMM’ or ‘xor b, #IMM’ doesn’t exist.
Best regards,
NoMaY
Dear NoMaY-san,
Your understanding is right. We apologize and have already started working to fix this bug.
Best Regards
The Open Source Tools Team
Hello support team,
Thank you for your replies in other threads.
Is there any information in this thread?
Best regards,
NoMaY