Interrupt routine trashes registers (GCC for Renesas RX)
Interrupt routine trashes registers (GCC for Renesas RX)
When reserving register for speed these sometime gets trashed…
CMAKE_C_FLAGS ” -mint-register=2″
CMAKE_C_FLAGS ” -msmall-data-limit=512″
The isr looks like:
ServiceFastRXI1:
0000009b: pushm r1-r5
0000009d: mov.l #0x6500, r4
000000a3: mov.l [r4], r2
000000a5: mov.b 40997[r13], r1
000000a9: mov.l #0x6300, r3
000000af: mov.l 7360[r11], r11
000000b3: mov.w [r11], [r3]
000000b5: add #4, r2, r3
000000b8: mov.b r1, [r2]
000000ba: bclr #8, r3
000000bc: mov.l r3, [r4]
000000be: bset #4, 29206[r13].b
000000c2: popm r1-r5
000000c4: rtfi
r11 is used as gp gets overwritten.
The same can happen with r10 I’ve noted…
Bug or feature?
/Henrik
Hello,
Thank you for reaching out to us!
According to the GCC documentation, the description of the -mint-register option is as follows:
-mint-register=N Specify the number of registers to reserve for fast interrupt handler functions. The value N can be between 0 and 4. A value of 1 means that register r13 is reserved for the exclusive use of fast interrupt handlers. A value of 2 reserves r13 and r12. A value of 3 reserves r13, r12 and r11, and a value of 4 reserves r13 through r10. A value of 0, the default, does not reserve any registers.
Based on this, when using -mint-register=2, the compiler reserves only r13 and r12. Using -mint-register=3 should result in the desired behavior.
There is a known bug affecting -mint-register=4, which results in r10 not being reserved. This will be resolved in the next release.
Please let us know if we can be of further assistance.
__
Best regards,
The Open Source Tools Team
Side noted:
The core in use RX23E/RX231.
Optimization level -O2
Toolchain 8.3.0.202104 but no change with newer ones.