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semihosting in LLVM for RISC-V MCU project
semihosting in LLVM for RISC-V MCU project
Hello.
I’d like to ask how to use semihosting in LLVM for RISC-V MCU toolchain.
LLVM for RISC-V MCU toolchain has semihosting library and it should be easier than struggling with UART.
Deleted -lnosys and added –specs=semihost.specs and successfully linked stdio library (#include <stdio.h> and called ‘puts’).
But I can’t see any outputs in Console, Debugger Console views in e² studio.
Do I need to do something else, such as heap allocation?
TIA.
Hello,
Thank you reaching out to us!
The semi-hosting library included with the LLVM RISC-V comes from the newlib 4.4 upstream sources, however this is only one of the necessary steps to have a working semi-hosted executable. It also requires support from e2 Studio’s gdb-server, which is not implemented currently. We are not aware of any plans to support semi-hosting RISC-V in e2 Studio at this point of time.
Please let us know if we can be of assistance with any other issues.
Best regards,
The Open Source Tools Team
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> It also requires support from e2 Studio’s gdb-server, which is not implemented currently.
Understood.
Dynamic printf can be good alternative solution.UART can be used, but need some implementation.
cf. https://community.renesas.com/mcu/risc-v-mcu/f/forum/58631/hello-world-exampleThank you for support. This query can be closed.
